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busctrl.h
1// THIS HEADER FILE IS AUTOMATICALLY GENERATED -- DO NOT EDIT
2
8#ifndef _HARDWARE_STRUCTS_BUSCTRL_H
9#define _HARDWARE_STRUCTS_BUSCTRL_H
10
16#include "hardware/regs/busctrl.h"
17
18// Reference to datasheet: https://datasheets.raspberrypi.com/rp2040/rp2040-datasheet.pdf#tab-registerlist_busctrl
19//
20// The _REG_ macro is intended to help make the register navigable in your IDE (for example, using the "Go to Definition" feature)
21// _REG_(x) will link to the corresponding register in hardware/regs/busctrl.h.
22//
23// Bit-field descriptions are of the form:
24// BITMASK [BITRANGE] FIELDNAME (RESETVALUE) DESCRIPTION
25
29typedef enum bus_ctrl_perf_counter_rp2040 {
30 arbiter_rom_perf_event_access = 19,
31 arbiter_rom_perf_event_access_contested = 18,
32 arbiter_xip_main_perf_event_access = 17,
33 arbiter_xip_main_perf_event_access_contested = 16,
34 arbiter_sram0_perf_event_access = 15,
35 arbiter_sram0_perf_event_access_contested = 14,
36 arbiter_sram1_perf_event_access = 13,
37 arbiter_sram1_perf_event_access_contested = 12,
38 arbiter_sram2_perf_event_access = 11,
39 arbiter_sram2_perf_event_access_contested = 10,
40 arbiter_sram3_perf_event_access = 9,
41 arbiter_sram3_perf_event_access_contested = 8,
42 arbiter_sram4_perf_event_access = 7,
43 arbiter_sram4_perf_event_access_contested = 6,
44 arbiter_sram5_perf_event_access = 5,
45 arbiter_sram5_perf_event_access_contested = 4,
46 arbiter_fastperi_perf_event_access = 3,
47 arbiter_fastperi_perf_event_access_contested = 2,
48 arbiter_apb_perf_event_access = 1,
49 arbiter_apb_perf_event_access_contested = 0
50} bus_ctrl_perf_counter_t;
51
52typedef struct {
53 _REG_(BUSCTRL_PERFCTR0_OFFSET) // BUSCTRL_PERFCTR0
54 // Bus fabric performance counter 0
55 // 0x00ffffff [23:0] PERFCTR0 (0x000000) Busfabric saturating performance counter 0 +
56 io_rw_32 value;
57
58 _REG_(BUSCTRL_PERFSEL0_OFFSET) // BUSCTRL_PERFSEL0
59 // Bus fabric performance event select for PERFCTR0
60 // 0x0000001f [4:0] PERFSEL0 (0x1f) Select an event for PERFCTR0
61 io_rw_32 sel;
63
64typedef struct {
65 _REG_(BUSCTRL_BUS_PRIORITY_OFFSET) // BUSCTRL_BUS_PRIORITY
66 // Set the priority of each master for bus arbitration
67 // 0x00001000 [12] DMA_W (0) 0 - low priority, 1 - high priority
68 // 0x00000100 [8] DMA_R (0) 0 - low priority, 1 - high priority
69 // 0x00000010 [4] PROC1 (0) 0 - low priority, 1 - high priority
70 // 0x00000001 [0] PROC0 (0) 0 - low priority, 1 - high priority
71 io_rw_32 priority;
72
73 _REG_(BUSCTRL_BUS_PRIORITY_ACK_OFFSET) // BUSCTRL_BUS_PRIORITY_ACK
74 // Bus priority acknowledge
75 // 0x00000001 [0] BUS_PRIORITY_ACK (0) Goes to 1 once all arbiters have registered the new...
76 io_ro_32 priority_ack;
77
78 bus_ctrl_perf_hw_t counter[4];
80
81#define busctrl_hw ((busctrl_hw_t *)BUSCTRL_BASE)
82static_assert(sizeof (busctrl_hw_t) == 0x0028, "");
83
84#endif // _HARDWARE_STRUCTS_BUSCTRL_H
85
Definition busctrl.h:52
Definition busctrl.h:64